It is MXFP4—
not MVFP4.
MX means microscaling. FP4 means each private element is four-bit floating point. The OCP standard makes the block—not the nibble—the real numerical contract.
Scalar E2M1 has one sign, two exponent and one mantissa bit. Its positive codebook is essentially 0, 0.5, 1, 1.5, 2, 3, 4 and 6. That is useful near unity and hopeless across tensors spanning many orders of magnitude.
MXFP4 groups 32 E2M1 elements under one 8-bit E8M0 scale. E8M0 is an unsigned, exponent-only power-of-two scale. Each represented value is the private FP4 value multiplied by the block scale.
E2M1
Sign, two exponent and one mantissa bit; subnormals and round-to-nearest ties-to-even; no reserved Inf or NaN patterns.
E8M0
A power-of-two exponent shared by 32 values. Hardware can combine scales with exponent adjustment rather than a general multiplier.
32 values
One outlier influences the quantization grid of 31 neighbors—the source of both low metadata cost and coupled error.
Spend exponent bits once.
Reuse them thirty-two times.
Scalar FP4
Tiny and coarse. A whole-tensor software scale cannot follow local changes in range.
MXFP4 block
Local block adaptation plus an element codebook that matrix hardware can consume natively.
Compression is only
the first dividend.
MXFP4 reduces bytes carried by weights and activations while targeting matrix engines that understand block scaling directly.
Against BF16, a packed 4.25-bit stream is about 3.76× smaller; against eight-bit data, about 1.88×. End-to-end savings are lower because norms, embeddings, accumulators, metadata, KV cache and buffers can remain wider.
The bigger payoff is movement. Smaller weights permit larger models or replicas in HBM. W4A4 execution shrinks both weight and activation traffic and can unlock native matrix throughput rather than dequantizing into a wider compute path.
More model, cache or concurrency fits.
Less HBM and fabric traffic.
More operands per matrix engine cycle.
A multi-vendor OCP numerical contract.
One outlier can tax
thirty-one innocent values.
Block floating point works when neighboring values share a range. It loses information when a block mixes one large outlier with many small values.
The scale must cover the largest magnitude. A large outlier pushes the FP4 grid outward; small neighbors enter a dead zone near zero or collapse onto a few coarse levels. E8M0 adds power-of-two scale rounding, which simplifies hardware but may waste range.
The OCP specification defines interchange and basic operations, but intentionally does not prescribe the detailed scale-selection algorithm. Calibration, clipping, rotations, smoothing, overflow-aware scale choice, QAT and selective higher-precision fallbacks can therefore materially change quality.
Outlier domination
The maximum magnitude selects the neighborhood’s scale.
Dead-zone loss
Weak values round to zero and disappear.
Grid noise
E2M1 provides only a handful of levels inside each block.
Four bits is not one thing.
| Format | Element | Scaling | Payload | Strength | Main cost | Scope |
|---|---|---|---|---|---|---|
| BF16 | 1/8/7 | Per value | 16 b | Range, training stability | Bytes | Standard |
| FP8 E4M3 | 1/4/3 | Tensor/delayed | 8 b + scale | Strong quality/throughput balance | ~2× FP4 bytes | OCP |
| INT4 | Integer | Group/channel | 4 b + metadata | Mature weight-only compression | Activation difficulty | Broad |
| Scalar FP4 | E2M1 | Software chosen | 4 b + scale | Simple storage | No standard native scaling | Primitive |
| MXFP4 | E2M1 | E8M0 / 32 | 4.25 b | Open, efficient W4A4 | Coarse scale/outliers | OCP open |
| NVFP4 | E2M1 | E4M3 / 16 + FP32 tensor | ≈4.5 b + tensor scale | Finer 4-bit accuracy | More metadata/vendor scope | NVIDIA |
MXFP4 versus NVFP4: both use E2M1 private elements. MXFP4 shares a coarse power-of-two scale across 32 values. NVFP4 uses a richer E4M3 scale across 16 values plus a tensor-level FP32 scale, spending more metadata to reduce outlier coupling.
MXFP4 versus INT4: E2M1 offers nonuniform floating magnitudes; INT4 offers a uniform integer grid after scaling. INT4 weight-only methods are common, while native W4A4 demands activation-aware recipes and suitable matrix hardware.
Open representation does not mean
identical performance.
AMD, Arm, Intel, Meta, Microsoft, NVIDIA and Qualcomm authored the OCP MX specification. Portability of representation is not equivalence of implementation.
NVIDIA Blackwell Tensor Cores support MXFP4 alongside NVFP4. AMD CDNA 4 Matrix Cores advertise MXFP8, MXFP6 and MXFP4 instructions. Implementations can differ in packing, conversion, accumulation, transpose layouts, fused epilogues and achieved throughput.
Always ask whether “support” means conversion or native W4A4 GEMM with hardware scale handling, suitable accumulation and end-to-end framework kernels. If conversion or unfused fallbacks dominate, four-bit storage can fail to become four-bit performance.
The format is one stage
of quantization.
PTQ
Calibrate an existing model using clipping, rotations or mixed-precision escape hatches. Cheap, but direct rounding can fail on sensitive activations.
QAT
Expose the model to MXFP4-like noise during training or fine-tuning. More investment, often better for native W4A4 quality.
W4A16
Compress weights but retain wide activations. Capacity gains remain; arithmetic throughput may not match native W4A4.
Mixed precision
Keep norms, embeddings, output heads, accumulators or fragile layers in FP8/BF16. Optimize the system, not numerical purity.
Quantization can become
part of model design.
Moonshot says Kimi K3 uses MXFP4 weights and MXFP8 activations, with quantization-aware training beginning at supervised fine-tuning—not a last-minute checkpoint conversion.
That matters for a 2.8-trillion-parameter sparse model. A plain four-bit weight floor is about 1.4 TB; MXFP4’s 4.25-bit payload puts the simple block-level floor near 1.49 TB before runtime overhead. BF16 begins near 5.6 TB. The format changes how many accelerators are required merely to hold one replica.
K3 is not an end-to-end W4A4 claim: the disclosed pairing is MXFP4 weights with MXFP8 activations. Wider activations retain range while the model captures much of the weight-capacity and weight-bandwidth benefit. “The model is FP4” is inadequate—weights, activations, KV state, accumulators and operators may each use different formats.
Moonshot frames MX formats as a broad-hardware-compatibility choice. That is a strategic payoff of an OCP standard, even though optimized kernels and achieved quality remain platform-specific.
Never benchmark
“FP4” by itself.
What was quantized?
State W4A4, W4A8 or W4A16; PTQ versus QAT; block order; scale choice; clipping; fallbacks; KV and accumulator formats.
What was executed?
Name hardware, kernels, batch, prompt/output lengths, parallelism, achieved bandwidth, power, latency and throughput.
What was preserved?
Report perplexity and task accuracy across reasoning, code and long context, plus any extra training or calibration expense.
MXFP4 makes precision
a neighborhood decision.
The individual number is four bits. Its meaning comes from the thirty-one values beside it and the exponent they share.
This is microscaling’s central move: keep private values tiny, restore range locally and make the block a unit of transport and computation. The dividend reaches HBM capacity, matrix throughput and fabric traffic.
The tradeoff is structural. An outlier changes the grid for an entire micro-block. MXFP4’s open format and simple E8M0 scaling favor portable hardware economy. NVFP4’s finer blocks and richer scales favor fidelity at modest extra metadata. INT4, FP8 and BF16 occupy other points on the triangle of quality, bytes and compute cost.
The best format is not the smallest encoding. It is the smallest end-to-end numerical contract the model, kernels and accelerator can execute without returning the savings as fallbacks, extra tokens or lost accuracy.
Specification first.
Vendor claims attributed.
OCP defines the normative format. Vendor documents establish hardware support; research results remain recipe-specific evidence. Accessed 18 July 2026.
- 01OCP MX Specification v1.0↗
- 02OCP MX Alliance announcement↗
- 03NVIDIA MXFP4/NVFP4 comparison↗
- 04AMD CDNA 4 architecture↗
- 05OCP Microscaling Formats paper↗
- 06Shared Microexponents (ISCA)↗
- 07MXFP4 error-reduction strategies↗
- 08NVFP4 KV-cache comparison↗
- 09Kimi K3 launch technical blog↗